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Low-Voltage Ride-Through Algorithm for Grid-Forming Converters

> 摘要:IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 40, NO. 1, JANUARY 2025 ## Low-Voltage Ride-Through Algorithm for Grid-Forming Converters Juan Dolado Fernández, Joaquín Eloy-García, Eduardo Rausell

0048_21.Low-Voltage Ride-Through Algorithm for Grid-Forming Converters

摘要:IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 40, NO. 1, JANUARY 2025 ## Low-Voltage Ride-Through Algorithm for Grid-Forming Converters Juan Dolado Fernández, Joaquín Eloy-García, Eduardo Rausell Navarro, Santiago Arnaltes Gómez, , Senior Member, IEEE and José Luis Rodríguez Amenedo **Abstract—In

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 40, NO. 1, JANUARY 2025

Low-Voltage Ride-Through Algorithm for Grid-Forming Converters

Juan Dolado Fernández, Joaquín Eloy-García, Eduardo Rausell Navarro, Santiago Arnaltes Gómez, , Senior Member, IEEE and José Luis Rodríguez Amenedo

Abstract—In recent years, the increasing integration of renew- able energy sources into power systems has led to significant

changes in grid operation. Power electronic converters are pri- marily used to connect these power plants to the electrical system

and, as key components in modern power systems, grid-forming (GFM) converters have emerged to provide the ability to au- tonomously establish and maintain system stability without the

need for synchronous generators (SGs). The current contribution during faults is one of the main differences between SGs and power

converters, which can affect protective systems. The most recent grid codes require a fast current injection in the event of a fault. This article presents a low-voltage ride-through control strategy for GFM converters based on virtual-flux orientation according to the European Commission Regulation (EU) 2016/631 and the Spanish Technical Supervision Standard requirements. For the validation of this control algorithm, a hardware test bed has been implemented

consisting of two dc voltage sources emulating a photovoltaic plant feeding the dc bus of a voltage source converter and, finally, a grid emulator where the different voltage faults have been programmed.

Index Terms—2016/631 (EU) regulation, grid-forming (GFM), low-voltage ride-through (LVRT), Spanish grid code, Spanish

Technical Supervision Standard (NTS).

I. INTRODUCTION HE global power generation scenario has undergone a

Tsignificant shift with the widespread integration of re-

newable energy sources (RES) into electricity systems. This change, exemplified by an annual addition of renewable energy capacity exceeding that of fossil fuels and nuclear sources combined since 2013, signifies a major transformation in the global energy landscape. Recent research has revealed scenarios in which certain power systems are nearing 100% hourly RES penetration [1], indicating the growing dominance of renewable

Received 24 May 2024; revised 27 July 2024; accepted 7 September 2024. Date of publication 10 September 2024; date of current version 12 December

  1. This work was supported in part by MCIN/AEI/ 10.13039/501100011033 under Grant PDC2022-133349-I00 and in part by the European Union “NextGenerationEU/PRTR.” Recommended for publication by Associate Editor Saeed Golestan. (Corresponding author: Juan Dolado Fernández.) Juan Dolado Fernández, Santiago Arnaltes Gómez, and José Luis Rodríguez Amenedo are with the Electrical Engineering Department, University Carlos III, 28911 Madrid, Spain (e-mail: jdolado@ing.uc3m.es; arnalte@ing.uc3m.es; amenedo@ing.uc3m.es). Joaquín Eloy-García is with the Ingenia Power Solutions SL, 28918 Madrid, Spain (e-mail: jeloygar@ing.uc3m.es). Eduardo Rausell Navarro is with CIEMAT, Spanish National Research Centre on Energy, Environment and Technology, 28040 Madrid, Spain (e-mail: eduardo.rausell@ciemat.es). Color versions of one or more figures in this article are available at https://doi.org/10.1109/TPEL.2024.3458193. Digital Object Identifier 10.1109/TPEL.2024.3458193 power plants, which use inverter-based resources (IBRs) for grid interconnection [2], [3]. This trend is also corroborated by reports from the International Renewable Energy Agency [4]. This transition, however, poses formidable challenges due to the inherent differences between generation based on IBRs and synchronous generators (SGs). IBRs lack the intrinsic capa- bility to provide grid inertia and strength, rendering electrical systems more vulnerable to disturbances [5]. Grid-following (GFL) converters emerged as the primary control method for IBRs, utilizing current controller loops and phase-locked loops for synchronization [6]. Nevertheless, instability issues in low- strength systems and the inability of GFL converters to operate in islanded mode or facilitate system restoration during black- outs [7], [8], [9] underscore the need for alternative control methods, thus giving rise to GFM converters. GFMs, which are controlled as voltage sources, imitate the behavior of SGs by maintaining internal voltage phasor angle and modulus during transient periods [10], offering features such as inertial response, power oscillation damping, and adaptability to islanded and low system-strength conditions [11]. Different control methodologies have been proposed for GFMs in the literature [12], including droop controls [13], [14], [15], [16], [17], synchronous machine-based controllers [18], [19], [20], [21], [22], [23], and nonlinear strategies [24], [25], [26], [27], [28]. Another essential aspect of GFM converters is the current limiting method to avoid over current situations during grid disturbances, as electronic converters can only tolerate small over currents (in the range of 1.1–1.3 p.u.) [29], [30]. Three main algorithms can be found in the literature. The first proposes adding saturators to the internal current control loops [31]. However, this strategy might cause system instability [32], [33]. Another strategy is to change to a GFL control mode during the fault [34], [35], [36], but this may cause stability problems in weak systems. Lastly, the use of virtual impedances has been proposed [37], [38], [39], but their parameterization is a complex problem because the current limitation is largely depending on the fault location and the selected virtual impedance [40], [41]. In addition, it has also been demostrated that the use of virtual impedances can lead to stability problems in parallel operation [42], [43]. To address these issues, a new GFM control methodology based on virtual-flux orientation has recently been published [44], [45], which allows for limiting the active and reactive currents in a much simpler way maintaining system stability.

© 2024 The Authors. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/

TABLE I GRID CODES LV RT R EQUIREMENTS

On the other hand, the integration of a high percentage of renewable energy into the power system has led to some grid codes requiring that these generators must help maintain voltage during faults with a fast current injection. Table I shows a sum- mary of some of these grid codes indicating for which voltage ranges the low-voltage ride-through (LVRT) is requested, how long they should operate during the voltage fault depending on the depth of the dip and how they should inject current, wheretr represents the rising time andtsis the settling time. For example, in the United States and Canada the IEEE 1547-2018 [46] and UL 1741 [47] standards specify the requirements necessary to certify IBRs, where are set the voltage ranges and the minimum time in which the converters must have the LVRT capability by injecting reactive current quickly. In California and Hawaii, the Rule 21 [48] and Rule 14 [49] standards are used, respectively, which are updates of the IEEE 1547 standard specific to each of these two states as they have a higher renewable penetration. Similarly, National Grid electricity system operator (ESO) [50] specifies LVRT requirements for converters in Great Britain. In Australia, the electricity market operator Australian energy market operator (AEMO) [51] and the national electricity rules (NER) [52] regulations set the LVRT capacity for converters in a similar way to the American standards but establishing the max- imum time that the injected reactive current must be in steady state. In Europe, countries have designed their own grid codes based on the Commission Regulation (EU) 2016/631 [53].For example, Germany through the standard AR-N-4110-VDE [54], Greece from the grid operator independent power transmission operator (IPTO) [55], and Spain with the Ministerial Order TED/749/2020 [56] and the Spanish Technical Supervision Standard (NTS) [57] define in their grid codes that during faults, the converters must be able to inject positive and negative sequence currents proportional to the voltage drop in a given time. Despite extensive coverage of positive and negative sequence currents injection strategies for GFL converters during unbal- anced faults [58], [59], [60], [61], such strategies have not been thoroughly explored for GFMs. For example, in [62],

[63], [64], and [65], some LVRT control strategies have been proposed. However, in these cases only balanced faults have been considered, when unbalanced faults are the most frequent. On the other hand, two control strategies where the negative sequence is considered based on voltage balancing priority and voltage magnitude priority are presented in [66], but since the desired ac voltage profile is prioritized, the current injection established by grid codes is not met. In other recent studies [3], [67], [68], [69], unbalanced faults have been analyzed, but the proposed control strategies only consist of limiting the total current, producing a noncontrolled negative sequence current injection during the fault, and therefore, without injecting the amount of current established by the strictest grid codes. The results shown in [70], [71], and [72] present interesting results as they attempt to control the injected negative sequence current. In [70], an LVRT strategy designed for a dispatchable virtual oscillator control is presented, but no results are shown on the converter response to the entry and exit of the voltage sags, being critical instants. A direct control is presented in [71].This type of control presents very good dynamics, but has a problem when implementing it in a real converter. Since it has a variable switching frequency, currents present a large high-frequency noise unless a very high switching is used, which may com- promise the switches or cannot be achieved due to limitations in the control board. Finally, in [72], the distribution of the positive sequence currents injected by the converter during the voltage sag is defined according to the X/R ratio of the impedance fault but it is not proportional to the voltage drop, as established by the European grid codes. Given the potential of the GFM as an alternative to overcome the limitations of GFL converters, new methodologies must be developed to ensure compliance with the guidelines established by the most stringent grid codes. Furthermore, the strategies found in the literature have only been tested in hardware in the loop, low-power hardware in the loop, or simulation setups, not in a commercial converter. This article have two main objectives, which are its main con- tributions. The first one is to propose an algorithm to control the injection of positive and negative sequence currents during faults

FERNÁNDEZ et al.: LOW-VOLTAGE RIDE-THROUGH ALGORITHM FOR GRID-FORMING CONVERTERS

Fig. 1. (a) Positive sequence reactive current injection required proportional to the positive sequence voltage error, (b) negative sequence current injection required

proportional to the negative sequence voltage error, and (c) reactive current injection limitation [56].

Fig. 2. Response times during faults [56].

for GFM converters according to the NTS and the Spanish grid code requirements; since, as shown in Table I,itislikelythemost restrictive grid code, meeting almost all requirements demanded by the others. In addition, this strategy has been implemented in the novel control scheme based on virtual flux-orientation, which allows us to limit the current in a simpler way than those found in the literature while maintaining the converter stability. The second one is to validate this algorithm on a commercial voltage source converter (VSC) within a power test bed in order to demonstrate the robustness of the control scheme presented. The rest of this article is organized as follows. Section II summarizes the requirements established by the Spanish system operator to be met by the converters during faults. Section III presents the control scheme implemented, a small-signal stability analysis of the system, and how the main control parameters have been tuned. A description of the equipment used and the results obtained in the laboratory are shown in Section IV. Finally, Section V concludes this article.

II. SPANISH GRID CODE REQUIREMENTS REVIEW

The current injection requirements for the generation modules during balanced and unbalanced faults are described in the Spanish grid code published in July 2020 [56]. Although due to the limitations of the laboratory a nominal power of 10 kVA has been used, the algorithm is designed for generation modules connected to medium-voltage distribution grid, in other words, type B and C modules according to the Spanish grid code (from 100 kW to 50 MW of maximum power). This standard states the following for these power plants.

  1. In the event of a balanced fault the converter is required to inject/absorb a positive sequence reactive current denoted as ΔI₁ (p.u.). As shown in Fig. 1(a), this current is proportional to the positive sequence voltage deviation, ΔU₁ (p.u.). The adjustable constant K₁, with a typical value of 3.5, can range between 2 and 6. Moreover, apart from the reactive current, the converter must also supply positive sequence active current until reaching the rated current value.

  2. On the other hand, during unbalanced faults the converter must inject/absorb a negative sequence current ΔI₂ (p.u.), proportional to the negative sequence voltage deviation ΔU₂ (p.u.) in addition to the reactive positive sequence current ΔI₁ specified in the previous point. Similar to K₁,theK₂ constant shown in Fig. 1(b) can also be adjusted within a range of 2 to 6. In the same way as for balanced faults, if the sum of the reactive currents of both sequences is not sufficient to reach the rated current value of the converter, positive sequence active current must be injected until it is reached.

  3. As shown in Fig. 1(c), a maximum value is set for total reactive current injected, which can reach a maximum value of 1 p.u.

  4. Lastly, Fig. 2 shows the maximum time at which the current required for each fault must be injected. The time that the converter response can be delayed (ti) before starting to inject current once the voltage dip occurs must not be greater than 20 ms. The response time (tr)fromthe beginning of current injection until it reaches 90% of the required response must comply with t i+ tr≤ 50 ms*.* (1)

The stabilization time (te) from the beginning of injection until the current settles around the required response with an error band between +20% and *−*10% must be 60 ms maximum. Therefore, the maximum total time in which the converter must stabilize its response within this error band is 80 ms from the time the fault occurs.

Fig. 3. Positive sequence (a) and negative sequence (b) control loops.

III. CONTROL SYSTEM

This section presents the control strategy designed to meet the Spanish grid code requirements during balanced and unbalanced faults once the converter is already connected to the grid. For its synchronization and connection to the grid, the algorithm described in [44] has been used, whereby a three phase voltage system identical to the grid are generated by aligning the virtual- flux vector (ψ⃗v) to the grid flux vector ( to inject/absorb positive and negative sequence currents during faults, the first step is to use the delayed signal cancellation method [73] to obtain the components of both sequences of mea- sures needed for the control to operate. These measures are the grid voltages (Vg2_abc) and the voltages ( (i_abc) at the converter’s output. Applying this algorithm, the positive and negative sequence components are obtained as

+1 v α= (vα 2

+1 v β = (vβ 2

− v α= (vα

− v β= (vβ

where vαand vβare the αβ components of the measured

′ ′

voltages and vαand vβare the same components but delayed by one quarter of the fundamental period. The positive and negative sequence control schemes shown in Fig. 3(a) and (b), respectively, are described as follows.

A. Positive Sequence Control Scheme ψ⃗). As it is necessary

The inputs to this control scheme are the positive sequence

αβ components of the grid voltage (V), the voltage at

g2_αβ

the converter output (Vgfm_αβ) and, finally, the currents passing

through the converter filter (iαβ). The output are the positive

sequence dq components of the voltage references (e). As

Vdq gfm_abc) and currents

shown in Fig. 3(a), the sequence control scheme is divided into four control loops. The first one, located at the top of Fig. 3(a) and highlighted in

yellow is the reactive power controller (RPC), which has two

′ − vβ) (2)

control subloops and depending on whether a voltage fault has been detected (Sdetsignal at high level) or not, it operates the

′ + vα) (3) right or left side, respectively. On the left side of the scheme,

there is a proportional control loop, which can operate as a PQ

*′*or photovoltaic (PV) node. For the tests performed, it has been + vβ) (4)

configured as a PV control, comparing the reference voltage ∗+

′(v), set at 1 p.u., with the modulus of the voltage measured − vα) (5)

at the output of the converter (v). The error signal is passed

through a proportional regulator with gain nqand the nominal flux (ψv +0 ), also set to 1 p.u., is then summed. In addition, the output term (Δψv +1 ) of the reactive current limiting block (RCL + ) is added, obtaining the modulus of the reference flux ψv ∗+ 1as ∗+ ∗+ + +0 +1 ψv1= nq(v − v)+ψv+Δψv. (6)

On the other hand, in the event of a fault detection, the control loop to the right of the RPC + is activated. Here, the positive sequence reactive current reference (Ireact ∗+ ) calculated during the fault according to the Spanish grid code is compared with the positive sequence component of the current i + d and the error signal is passed through a PI regulator. The fact that it is compared with the i + d component instead of the i + qcomponent is because the control angle is orientated to the grid flux and not to the voltage, although this will be explained in more detail in Section III-C. Finally, instead of adding the nominal flux ψv +0, the grid flux componentψ dg + is added to obtain the reference flux in case of voltage sag as follows: ∗+ + +2 ψv2= ψ dg +Δψv. (7)

This is the main new feature introduced to the RPC + .The nonuse of the proportional loop and using as reference the grid flux instead of the nominal one during faults provides a much more robust and faster response. Therefore, the modulus of the flux to be controlled is calculated as follows:

ψ ∗+ = ψv ∗+ 1Sdet+ ψv ∗+ 2Sdet*.* (8)

At the bottom of Fig. 3(a) and highlighted in orange is the + active power controller (APC), which is designed to obtain the control angle Θ as ∫ ∫ + ′+ + + Θ= w dt = w − w₁ + w₂ dt (9)

where w ′+ represents the output of the loop that replicates the swing equation of an SG, where D₁,2represents the damping constant and H₁,2the inertia constant. Thew₁ + term is the output of the power system stabilizer block (PSS₁,2), which helps to compensate the damped active power response when the inertia constant is significant and the damping factor is low. The last term,w₂ +, is the output of the active current limiter (ACL + ) block responsible for ensuring that the active current does not exceed + ∗+ its maximum value. In this block, P and P represent the positive active power measured and its reference, respectively. The main novelty in this control loop is the methodology implemented for its operation during voltage faults. In the model presented in [45], a current loop similar to those used in the RPC + was implemented with the amount of positive sequence active current reference to be injected and its output was added as an additional term in the Θ calculation. This resulted in a slow and sometimes unstable response so in the model developed in the laboratory it has been implemented differently. When a voltage disturbance occurs, a newP ∗+ is calculated as a function of the active current to be injected (Iact ∗+ ) as follows:

∗+ + ∗+ P = v Iact*.* (10)

In addition, the D, H, and PSS constants in Fig. 3(a) are updated (shown in the Appendix as D₂, H₂, and PSS₂) in order to achieve fast and robust current injection during the fault. In order to make the system much faster, the value of the constants H₂ and D₂ have been decreased, at the cost of decreasing the system damping [44]. For the same reason, the gain of the PSS₂ has been significantly increased, resulting in a robust response. In the middle left of Fig. 3(a) and highlighted in green is the virtual-flux measurement (VFM) block, which is respon- sible for obtaining the positive sequence αβ components of the converter’s virtual-flux, ψ +. To achieve this, the converter αβ voltages V gfm_ + αβ are integrated with a time constant equal to 2πf, where f is the nominal frequency (50 Hz), and passed through a high-pass filter with a wccalculated for a cut-off frequency of 5 Hz. Also, the filter currents i + αβ multiplied by the value of the filter impedance Lfin p.u. are added. To calculate the d component of the grid flux (ψ d + ), the same method is applied with the voltages V g + 2_αβ but without adding the current term. Then, a Park’s transformation with the control angle Θ is applied. This way of obtaining the virtual flux is also one of the major differences with respect to the original model, since the method originally used did not perform the integral in a real-time application. Finally, located in the right half of Fig. 3(a) is the virtual-flux orientation control block. Here, the αβ components of the flux calculated in the VFM are transformed intodq components using Park’s transformation and the control angle Θ calculated in the APC + block. The d component of the virtual-flux is compared with the modulus of the flux calculated in the RCP + block and the q component with 0. Finally, after passing the error signals through two PI controllers, the feedforward signals are added in order to compensate the cross-coupling terms, obtaining the + positive sequence voltage references e dq.

B. Negative Sequence Control Scheme Fig. 3(b) shows two similar control loops for calculating the negative sequence reference voltages e −. As for the RPC +, dq these two blocks contain two subloops that operate depending on whether a voltage sag has been detected or not. The reactive current controller (RCC − ) is located at the top and highlighted in purple. Initially, this block is responsible for maintaining the negative sequence voltage V − of the converter at 0 by gfm_d calculating the e − term. However, when an unbalanced fault is detected it obtains the d1 e − term by comparing the negative sequence reactive current reference d2 I ∗− with the i − component react d and passing the difference through a PI regulator. Therefore, the component of the reference negative sequence voltage e − can be obtained as d

e − = e − Sdet+ e − Sdet*.* (11) d d1 d2

The active current controller (ACC − ) is located at the bottom of Fig. 3(b), which operates in a very similar way to the RCC −

but instead of keeping the voltagee − dat 0 it maintains the voltage e − qand in case of a fault, it regulates the amount of negative sequence active current injected. Similar to (11), the voltage

Fig. 4. Converter switching pattern calculation [45].

Fig. 5. Vector diagram of the GFM converter based on the virtual-flux in

steady-state operation [44].

reference e − qis calculated as

e − q= e − q1Sdet+ e − q2Sdet*.* (12)

Once the reference voltages for both sequences have been obtained, an inverse Park’s transform (dq − abc)isfirstper- formed with the Θ angle for the positive sequence and Θ ′

for the negative sequence, being Θ ′ = *−*Θ. Then, the three phase voltages obtained for each sequence are summed and the switching pattern of the converter is then determined using space vector pulsewidth modulation technique, as shown in Fig. 4.

C. Current Control Strategy The current injection strategy during faults developed for this type of grid-forming converters has been based on the NTS and the Spanish grid code requirements. As described in Section II, positive and negative current injection/absorption is required depending on the type of fault and the voltage dip depth. For the positive sequence, the first step is to calculate the amount of reactive current to be injected as I react ∗+ = K₁Δv + (13)

  • where K₁ is the constant defined by the grid code and Δv is the positive sequence voltage variation. This value is limited to a maximum value of 1 p.u. If the fault is unbalanced the converter shall inject the positive sequence current it must and, for neg- ative sequence it will only absorb reactive current. Therefore, the negative sequence reference currents can be calculated as follows:

I act ∗− =0 (14) ∗− − I react= K₂Δv (15) − being K₂ the constant set by the grid code and Δv is the negative sequence voltage increment. In the event that the sum of the reference reactive currents of both sequences does not reach the rated current value of the converter, active current must be injected until this value is reached. For the calculation of the value of the positive sequence active current to be injected, it must be considered that

|i⃗+| + |i⃗−| =1 (16)

where |i⃗+| and |i⃗−| represent the modulus of the positive and negative sequence currents, respectively, and 1 is in per-unit. Due to the fact that the maximum value of the modulus of the total current occurs at the moment when the vectors i⃗+and i⃗− are collinear, thus being the most critical condition to consider in the control strategy. Since only negative sequence reactive current will be absorbed, if necessary, there will be no active current of this sequence. Therefore, (16) can be rewritten as √ (Iact ∗+ ) 2+(I react ∗+ ) 2+ I react ∗− =1*.* (17)

By subtracting Iact ∗+ from the equation, is obtained √ I ∗+ = (1 − I ∗− ) 2*−* (I∗+)2*.* (18) act react react It may happen that the voltage dip is deep enough so that the sum of the reference reactive currents of both sequences exceeds the rated current value. To prevent this from happening, a parameter R has been added, which reduces both references proportionally so that this value is not exceeded, even if this means reducing the constants K₁ and K₂ outside the established range. Therefore

|imax⃗ | = R × (K₁Δv + + K₂Δv −

) ≤ 1 (19) will always be fulfilled. On the other hand, Fig. 5 shows the vector diagram of a grid- forming converter based on the orientation of the virtual-flux during steady state. It can be seen how the control scheme used orients the d-axis to the virtual-flux, causing the q-axis to be aligned with the internal voltage of the converter, ⃗e. This means that, unlike the methods normally used, the i⃗dcurrents of both sequences represent the reactive current of the converter and the i ⃗ qcomponents represent the active current. Finally, a strategy has been implemented for the input and output transitions of voltage sags. The main reason is because the current limiters used in this model do not limit the current modulus as other methods do in order to maintain stability, instead they start to act when the current exceeds the maximum value. This may cause overcurrents at the transitions of the fault. To protect the equipment, a power electronics blocking strategy was implemented when an overcurrent is detected. Switching

Fig. 6. Eingenvalues corresponding to dq components of the flux vectors.

is blocked for a maximum of 20 ms. It then resumes operation, injecting rapidly and smoothly the currents required according to the NTS standard. For the output of the voltage sag, the converter stops switching again in case it detects an overcurrent. Then, the converter sets the three reference currents Iact ∗+, Iact ∗−, and Ireact ∗−

to 0 and the Ireact ∗+ to the prefault value for 30 ms. Finally, the converter returns to its prefault mode operation when the fault is cleared.

D. Regulator Tuning For the selection of the parameters of the main PI regulators, which obtain the positive sequence reference voltages (e

  • d, e +

q), the same methodology has been employed for both components. After compensating cross-coupling terms shown in Fig. 3(a),the plant transfer function would be as follows:

ψ dv + ψqv + Tf GP(s)= + = + =. (20) e d e qTfs +1

On the other hand, the transfer function of the PI controller can be defined as () TPIs +1 GPI(s)=KPI(21) TPIs

where TPIis the time constant of the regulator and KPIits proportional constant. The open-loop transfer function between the controller and the plant can be expressed as ()() TPIs +1 Tf G(s)=GPI(s)GP(s)=KPI*.* TPIs Tfs +1 (22) Choosing a time constant for the regulator equal to the time constant of the converter filter yields

KPI G(s)=. (23) s ′ The closed-loop transfer function G (s) can then be obtained as

′G(s) KPI G (s)= = (24) 1+G(s) s + KPI

where the bandwidth of the system can be expressed as

1 τ i=. (25) KPI

By setting the proportional constantKPIto 1 p.u. and the con- troller time constant TPIequal to the filter constant, a bandwidth equal to the nominal w is being set, which for the nominal fre- quency of 50 Hz used yields a value of 314.16 rad/s. With these values in the main virtual-flux regulators, the system is stable, as will be seen in the small-signal study in the next section. A similar adjustment has been made for the negative sequence regulators. Regarding the setting of the RCL + and ACL + current limiter regulators, the first step has been to look for parameter values that would provide an acceptable settling time and system response. Once these parameters were set, a parameter sweep has been performed to fine-tune these parameters in order to improve the final system response and settling time. Finally, for

the adjustment of the PSS values, the methodology explained in [44] and [74] has been followed.

E. Small-Signal Stability In [44], the dynamic equations of the VSC based on the virtual-flux orientation using the dq components of the ψ⃗vand ψ ⃗ vectors are described as dψdvψdvψd dt + T = ed+ T + ωψqv(26) f f dψqvψqvψq + = eq+ − ωψdv(27) dt TfTf

dψd = vg2 d+ ωψq(28) dt dψq = vg2 q− ωψ .d(29) dt As shown in Fig. 6, when (26), (27), (28), and (29) are expressed as a matrix, its state-matrix presents 2 complex conjugated eigenvalues. The eigenvalues corresponding to the variables ψdand ψqare located on the imaginary axis whose naturalω is equal to 341.16 rad/s. Similarly, the two eigenvalues corresponding to ψdvand ψqvhave a negative real part equal to the inverse of Tf. For the calculation of the filter time constant, it is taken into account that the X/R ratio of the inductance used in the laboratory is 50. Therefore, ifLfis 200μH as indicated in the Appendix, the filter resistance can be calculated as 1.25 mΩ. Since there is no other resistor in the filter, the value of the time constant can be calculated as the division between the impedance and the resistor, which gives Tf= 159.2 ms and its inverse

6.28 rad/s. These eigenvalues have a damping factor ξ = 2%, but as will be seen later, the virtual-flux regulator enables this factor to be increased. The internal voltage vector of the converter⃗ecan be expressed as a function of the error between the virtual-flux ψ⃗vand the ∗ reference flux ψ⃗ as follows once the error passes through the PI regulator ∫ ⃗∗ ⃗ ⃗∗ ⃗ ⃗e = KPI(ψ − ψv)+ TPI (ψ − ψv)dt. (30)

Fig. 8. Hardware test bed.

Fig. 7. Eingenvalue loci corresponding to the virtual-flux control.

Separating (30) in dq-components and taking into account that the flux reference for the q component is 0 and for the d component is ψ ∗, results in ∫ ∗1∗ e d= KPI(ψ − ψdv)+ (ψ − ψdv)dt (31) TPI ∫ 1 e q= KPI(−ψqv)+ (−ψqv)dt. (32) TPI

In order to avoid using integrals in the dynamic equations of the converter, the terms xdand xqhave been added

dxd1∗ = (ψ − ψdv) (33) dt TPI dxq1 = (−ψqv). (34) dt TPI

Substituting (33) and (34) in (31) and (32) yields

e d= KPI(ψ ∗ − ψdv)+xd(35)

e q= KPI(−ψqv)+xq. (36)

Finally, if (35) and (36) are substituted into the dynamic equations (26) and (27), results () dψdv1 ψd ∗ = − + KPIψdv+ ωψqv+ + KPIψ + xd dt TfTf (37) () dψqv1 ψq = − + KPIψqv− ωψdv+ + xq. (38) dt TfTf

The terms corresponding to ψdvand ψqvin (37) and (38) depend on the gain of the PI controller, directly affecting this parameter in the damping of the system as will be seen in the fol- lowing. With the equations obtained, the converter dynamics can now be expressed through six state variables, thedq-components of the virtual-flux, the grid flux, and the xdand xqvariables defined in (33) and (34).Fig.7 shows the eingenvalues loci corresponding to the converter dynamics applying the proposed control based on the virtual-flux for a controller time constant

equal to the filter constant and a KPIthat is varied from 0 to 2 p.u. The system parameters are as described above, with ω =

314.16 rad/s and Tf= 159.2 ms. The eigenvalues corresponding to the grid flux components ψd,qare maintained constant on the imaginary axis. On the other hand, the corresponding eigenvalues of the converter virtual-flux components ψdv,qvare shifted to the real negative axis as KPI increases, keeping their imaginary part constant. IfKPI= 1 p.u., the system bandwidth coincides with the fundamental frequency and the damping factor is ξ = 0.707. Finally, the eigenvalues of the corresponding xd,qvariables remain practically constant in the negative half-plane.

IV. EXPERIMENTAL RESULTS

This section presents the test bed implemented and the results obtained during different experiments. These tests consist of two balanced three-phase faults and two unbalanced phase-to- phase faults of different depths with a duration 0.5 s. K₁ and K₂ constants have been set at 2 in order to observe a greater amount of positive sequence active current injected for the smaller sags in the tests carried out in the laboratory. All the faults have been programmed in the pacific power source (PPS) with a voltage drop time of 10 ms, in accordance with the NTS requirements to certificate the equipment.

A. Hardware Test Bed Description The components shown in Fig. 8 have been used in order to test the algorithm for GFM converters based on the virtual-flux under balanced and unbalanced faults. The connections between these components are shown in Fig. 9. The equipment is described as follows.

  1. PV Emulator: To emulate the operation of a PV plant, two regulated dc power supplies have been used. The sources are magna-powers and they have been connected in par- allel, obtaining a maximum output current and voltage of 40 A and 500 V. These sources are unidirectional, so two protection diodes have been placed at the output of each source.

Fig. 9. Test bed connections.

  1. VSC: The commercial dc–ac converter is integrated by dif- ferent components. The control algorithm is programmed in C language using MATLAB/Simulink and loaded on a control board, which consists of a DSP of the TIC6000 family and an ARM processor for high-speed communica- tions. This processor allows a LabVIEW-based real-time monitoring of 64 variables via UDP communications at 100 Mb/s. Furthermore, the control board includes an field programmable gate array (FPGA) responsible for generating, supervision, protection, and conditioning of both analog and digital input/outputs channels. The sec- ond element of the converter is the insulated gate bipo- lar transistors and drivers, which operate at a switching frequency (fsw) of 2604 Hz. In addition, the converter includes a TM241CE40R PLC and an HMIGTO3510 human-machine interface (HMI) from Schneider. Finally, there are two switches, one for connecting the ac side of the converter to the grid (S₂) and one for the dc bus (S₃) where a set of six 900 μF parallel capacitors adding up to 5.4 mF is installed.
  2. Filter: It is located inside the cabinet and consists of a three-phase LC filter. The values for the inductance (Lf) and capacitance (Cf) of the filter are 200 μH and 200 μF, respectively. It is important to mention that this filter is designed to operate at 300 kVA rated power, but due to laboratory limitations the converter has been operated at 10 kVA.
  3. Transformer: Despite not being visible in Fig. 8, a Dyn11 type transformer (T) with a 400/230 V transformer ratio is located behind the equipment.
  4. Grid Emulator: The PPS 3450AZX is a 45 kW bidirec- tional power source that can perform as a voltage source, current source, or load for both ac and dc. As it is intended to emulate the power grid, the PPS has been configured as a three-phase ac voltage source, allowing to program the desired voltage faults through its interface at point F illustrated in Fig. 9.
  5. Measurement instruments: For optimal operation of the converter control, different voltage, and current sensors have been installed. The two voltage sensors on the dc bus, VPVand VDC, measure the voltage at the PV emulator and the capacitor voltage located on the dc bus, respectively. If the VPVsensor measures enough voltage, a maneuver will be triggered to close switch S₃ and feed the dc capacitor. If something happens and theVDCsensor detects that there is no longer enough power, the converter will stop working and open the switch again. On the ac side, the currents in the converter filter, iabc, and the voltages on both sides Fig. 10. Voltages and currents during a balanced fault with 0.2 p.u. depth.

of switch S, V, and V are measured. These 2 gfm_abc g2_abc measurements allow the virtual-flux of the converter and the grid to be calculated. Finally, a Chauvin Arnoux C.A 8335 power and quality analyzer is located on the trans- former primary (Vg1) in order to monitor how the voltages on both sides of the transformer vary during unbalanced faults [75] and verify if the converter is under the desired voltage fault.

B. Balanced Three-Phase Faults Fig. 10 shows the results obtained for a balanced voltage sag of 20% depth. In the two graphs at the top, the instantaneous values of the converter voltages and currents, respectively, can be observed. In the lower two graphs, the modulus of the pos- itive sequence voltage of the converter (V

  • ) and the positive gfm sequence active (Iact + ) and reactive (Ireact + ) currents are plotted. At t = 6.48 s, the voltage drops to 0.8 p.u., provoking the current to increase rapidly and forcing the converter to stop switching for 20 ms. At t = 6.5 s, fast current injection begins, reaching steady state at t = 6.55 s. According to the NTS standard and the value of the constant K₁ set to 2, for a voltage

Fig. 11. Voltages and currents during a balanced fault with 0.75 p.u. depth.

Fig. 12. Voltages and currents during an unbalanced fault with 0.18 p.u. depth.

drop of 0.2 p.u. the converter must inject 0.4 p.u. of positive sequence reactive current. On the other hand, since the value of the rated current of the converter has not been reached, 0.91

p.u. of positive sequence active current is injected until that value is reached. At t = 6.98 s, the fault clears and the converter returns to prefault operation in 30 ms. For this type of sag, the overcurrent generated at the exit of the fault is not sufficient to stop the converter from switching. On the other hand, Fig. 11 shows the results obtained for a voltage fault of 75% depth as for the previous test. Att= 5.58 s, the voltage drop occurs, causing a current increase and the con- verter stops switching to protect itself. And, 20 ms later, the rapid injection of current begins, reaching steady state at t = 5.65 s. As the depth of this sag is 0.75 p.u., the converter should inject 1.5 p.u. of positive sequence reactive current, but this would endanger the equipment. For this reason, following the Spanish regulations, the maximum positive sequence reactive current that the converter can provide is limited to 1 p.u. Finally, at the exit of the voltage sag a high enough overcurrent is generated to cause the converter to stop switching again, reconnecting to the grid 20 ms later and returning to its prefault mode of operation very fast. C. Unbalanced Phase-to-Phase Faults Fig. 12 shows the results obtained during a phase-to-phase voltage fault of 18% depth. As in the previous section, the first two graphs represent the instantaneous value of the con- verter voltages and currents. The next two graphs represent the modulus value of the voltage and the active and reactive currents of positive sequence and then, the same variables of − − − negative sequence (Vgfm, Iact, andIreact) are plotted in the last two graphs. At t = 5.27 s, the voltage sag occurs. At that moment, due to the high overcurrent, the converter stops switching for 20 ms to just after that start with the fast current injection at t = 5.29 s. It can be seen that for both positive and negative sequence currents, the steady-state value is reached at t =

5.35 s. The positive sequence voltage during the fault drops to a value of 0.82 p.u., therefore, the positive sequence reactive current injected is 0.36 p.u. On the other hand, the negative sequence voltage increments 0.18 p.u., causing the reactive current to be absorbed by the converter to also be 0.36 p.u. As the sum of both reactive currents does not reach the rated value of the converter, 0.52 p.u. of positive sequence active current is injected, complying with (17). At the exit of the sag, the current generated does not exceed the limit as in the first test of the balanced faults, avoiding power electronics blocking mechanism. Finally, Fig. 13 shows the results for an unbalanced phase- to-phase voltage fault of 40% depth in the same way as for the previous test. At t = 3.78 s, the fault occurs, provoking an overcurrent that causes the converter to stop switching. After 20 ms, fast reactive current injection begins for both sequences. For a voltage variation of 0.4 p.u. and values of K₁ and K₂ set to 2, 0.8 p.u. of reactive current should be injected and absorbed, respectively, for each sequence. This would cause the

APPENDIX PARAMETERS

TABLE II TEST BED PARAMETERS

TABLE III CONTROL SYSTEM PARAMETERS

Fig. 13. Voltages and currents during an unbalanced fault with 0.4 p.u. depth.

value of the rated converter current to be exceeded, therefore, the parameter R defined in (19) acts to proportionally reduce both references and set them to 0.5 p.u. In compliance with the NTS, the converter currents at t = 3.86 s are in steady state. At the exit of the voltage sag, a current peak is generated causing the converter to stop switching and then fast and robustly reconnect to the grid again.

V. C ONCLUSION In this article, a new LVRT algorithm have been validated for the novel grid-forming converters based on virtual-flux orien- tation according to the requirements of the Spanish grid code and the NTS. The results obtained in a commercial converter demonstrate a more robust and efficient response to voltage faults than other previously developed techniques, such as the one developed by the same authors. With the new control scheme presented, the converter ef- fectively avoids high inrush current by employing a strategy of ceasing switching at the entry and exit of voltage faults. Moreover, it showcases its capability of performing controlled rapid current injections of both sequences according to the Spanish grid code, being these currents proportional to the voltage drop and meeting the response and stabilization times set in this grid code. In addition, the results highlight that the converter consistently delivers its nominal current value without ever exceeding its rated value regardless of the type of voltage drop.

REFERENCES

[1] P. Christensen et al. High Penetration of Power Electronic Interfaced Power Sources and the Potential Contribution of Grid Forming Converters. ENTSO: Brussels, Belgium, 2020. [2] Q. Zhang, M. Mao, G. Ke, L. Zhou, and B. Xie, “Stability problems of PV inverter in weak grid: A review,” IET Power Electron, vol. 13, no. 11, pp. 2165–2174, 2020. [3] S. F. Zarei, H. Mokhtari, M. A. Ghasemi, and F. Blaabjerg, “Reinforcing fault ride through capability of grid forming voltage source converters using an enhanced voltage control scheme,” IEEE Trans. Power Del., vol. 34, no. 5, pp. 1827–1842, Oct. 2019. [4] Renewable Energy Statistics, Int. Renew. Energy Agency (IRENA), Mas- dar City, United Arab Emirates, 2021. [5] ENTSO-E, Stability Management in Power Electronics Dominated Sys- tems: A Prerequisite to the Success of the Energy Transition, Brussels, Belgium, Jun. 2022. [6] R. Rosso, X. Wang, M. Liserre, X. Lu, and S. Engelken, “Grid- forming converters: Control approaches, grid-synchronization, and future trends—A review,” IEEE Open J. Ind. Appl., vol. 2, pp. 93–109, 2021, doi: 10.1109/OJIA.2021.3074028. [7] J. Matevosyan et al., “A future with inverter-based resources: Finding strength from traditional weakness,” IEEE Power Energy Mag., vol. 19, no. 6, pp. 18–29, Nov./Dec. 2021. [8] Y. Li, Y. Gu, and T. C. Green, “Revisiting grid-forming and grid-following inverters: A duality theory,” IEEE Trans. Power Syst., vol. 37, no. 6, pp. 4541–4554, Nov. 2022. [9] P. Tielens and D. Van Hertem, “The relevance of inertia in power systems,” Renewable Sustain. Energy Rev., vol. 55, pp. 999–1009, 2016. [10] J. Matevosyan et al., “Grid-forming inverters: Are they the key for high re- newable penetration?,” IEEE Power Energy Mag, vol. 17, no. 6, pp. 89–98, Nov./Dec. 2019. [11] D.B. Rathnayake et al., “Grid forming inverter modeling, control, and applications,” IEEE Access, vol. 9, 114781–114807, 2021. [12] H. Zhang, W. Xiang, W. Lin, and J. Wen, “Grid forming converters in re- newable energy sources dominated power grid: Control strategy, stability, application, and challenges,” J. Modern Power Syst. Clean Energy,vol.9, no. 6, pp. 1239–1256, 2021. [13] P. Unruh, M. Nuschke, P. Strauß, and F. Welck, “Overview on grid-forming inverter control methods,” Energies, vol. 13, 2020, Art. no. 2589.

[14] W. Du et al., “A comparative study of two widely used grid-forming droop controls on microgrid small-signal stability,” IEEETrans.Emerg.Sel. Topics Power Electron., vol. 8, no. 2, pp. 963–975, Jun. 2020. [15] M. A. Awal, H. Yu, S. Lukic, and I. Husain, “Droop and oscillator based grid-forming converter controls: A comparative performance analysis,” Front. Energy Res., vol. 8, 2020, Art. no. 168. [16] S. Fazal, M. E. Haque, M. T. Arif, and A. Gargoom, “Droop control techniques for grid forming inverter,” in Proc. IEEE PES 14th Asia-Pac. Power Energy Eng. Conf., Melbourne, VIC, Australia, 2022, pp. 1–6. [17] S. M. Mohiuddin and J. Qi, “A unified droop-free distributed secondary control for grid-following and grid-forming inverters in AC microgrids,” in Proc. IEEE Power Energy Soc. Gen. Meeting, Montreal, QC, Canada, 2020, pp. 1–5. [18] M. Ashabani and J. Jung, “Synchronous voltage controllers: Voltage-based emulation of synchronous machines for the integration of renewable energy sources,” IEEE Access, vol. 8, pp. 49497–49508, 2020. [19] M. Li, W. Huang, N. Tai, L. Yang, D. Duan, and Z. Ma, “A dual-adaptivity inertia control strategy for virtual synchronous generator,” IEEE Trans. Power Syst., vol. 35, no. 1, pp. 594–604, Jan. 2020. [20] M. Guan, W. Pan, J. Zhang, Q. Hao, J. Cheng, and X. Zheng, “Syn- chronous generator emulation control strategy for voltage source converter (VSC) stations,” IEEE Trans. Power Syst., vol. 30, no. 6, pp. 3093–3101, Nov. 2015. [21] J. Alipoor, Y. Miura, and T. Ise, “Power system stabilization using vir- tual synchronous generator with alternating moment of inertia,” IEEE

J. Emerg. Sel. Topics Power Electron., vol. 3, no. 2, pp. 451–458, Jun. 2015. [22] D. Li, Q. Zhu, S. Lin, and X. Y. Bian, “A self-adaptive inertia and damping combination control of VSG to support frequency stability,” IEEE Trans. Energy Convers., vol. 32, no. 1, pp. 397–398, Mar. 2017. [23] M. Colombino, D. Groß, J. Brouillon, and F. Dörfler, “Global phase and magnitude synchronization of coupled oscillators with application to the control of grid-forming power inverters,” IEEE Trans. Autom. Control, vol. 64, no. 11, pp. 4496–4511, Nov. 2019. [24] S. A. Aghdam and M. Agamy, “Virtual oscillator-based methods for grid- forming inverter control: A review,” IET Renew. Power Gener., vol. 16, pp. 835–855, 2022. [25] B. B. Johnson, M. Sinha, N. G. Ainsworth, F. Dörfler, and S. V. Dhople, “Synthesizing virtual oscillators to control islanded inverters,”IEEE Trans. Power Electron., vol. 31, no. 8, pp. 6002–6015, Aug. 2016. [26] M. Sinha, F. Dörfler, B. B. Johnson, and S. V. Dhople, “Uncovering droop control laws embedded within the nonlinear dynamics of van der POL oscillators,” IEEE Trans. Control Netw. Syst., vol. 4, no. 2, pp. 347–358, Jun. 2017. [27] M. A. Awal, H. Yu, H. Tu, S. M. Lukic, and I. Husain, “Hierarchical control for virtual oscillator based grid-connected and islanded microgrids,” IEEE Trans. Power Electron., vol. 35, no. 1, pp. 988–1001, Jan. 2020. [28] M. A. Awal and I. Husain, “Unified virtual oscillator control for gridform- ing and grid-following converters,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 9, no. 4, pp. 4573–4586, Aug. 2021. [29] M. Zubiaga et al., “Enhanced TVI for grid forming VSC under unbalanced faults,” Energies, vol. 14, 2021, Art. no. 6168. [30] J. C. Quispe and E. Orduña, “Transmission line protection challenges influenced by inverter-based resources: A review,” Prot. Control Mod. Power Syst., vol. 7, no. 3, pp. 1–17, Jul. 2022. [31] L. Huang, H. Xin, Z. Wang, L. Zhang, K. Wu, and J. Hu, “Transient stability analysis and control design of droop-controlled voltage source converters considering current limitation,” IEEE Trans. Smart Grid, vol. 10, no. 1, pp. 578–591, Jan. 2017. [32] H. Xin, L. Huang, L. Zhang, Z. Wang, and J. Hu, “Synchronous instability mechanism of P-f droop-controlled voltage source converter caused by current saturation,”IEEE Trans. Power Syst., vol. 31, no. 6, pp. 5206–5207, Nov. 2016. [33] A. Tayyebi, D. Groß, A. Anta, F. Kupzog, and F. Dörfler, “Frequency stability of synchronous machines and grid-forming power converters,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 8, no. 2, pp. 1004–1018, Jun. 2020. [34] S. Mukherjee, P. Shamsi, and M. Ferdowsi, “Improved virtual inertia based control of a grid connected voltage source converter with fault ride-through ability,” in Proc. North Amer. Power Symp., Sep. 2016, pp. 1–5. [35] K. O. Oureilidis and C. S. Demoulias, “A fault clearing method in converter-dominated microgrids with conventional protection means,” IEEE Trans. Power Electron., vol. 31, no. 6, pp. 4628–4640, Jun. 2016. [36] K. Shi, W. Song, P. Xu, Z. Fang, and Y. Ji, “Low-voltage ride-through control strategy for a virtual synchronous generator based on smooth switching,” IEEE Access, vol. 6, pp. 2703–2711, 2017.

[37] Z. Jin and X. Wang, “A DQ-Frame asymmetrical virtual impedance control for enhancing transient stability of grid-forming inverters,” IEEE Trans. Power Electron., vol. 37, no. 4, pp. 4535–4544, Apr. 2022. [38] X. Wang, Y. W. Li, F. Blaabjerg, and P. C. Loh, “Virtualimpedance-based control for voltage-source and current-source converters,” IEEE Trans. Power Electron., vol. 30, no. 12, pp. 7019–7037, Dec. 2015. [39] C. Glockler, D. Duckwitz, and F. Welck, “Virtual synchronous machine control with virtual resistor for enhanced short circuit capability,” in Proc. IEEE PES Innov. Smart Grid Technol. Conf. Eur., Sep. 2017, pp. 1–6. [40] A. Gkountaras, S. Dieckerhoff, and T. Sezi, “Evaluation of current limiting methods for grid forming inverters in medium voltage microgrids,” in Proc. IEEE Energy Convers. Congr. Expo., 2015, pp. 1223–1230. [41] D. Groß and F. Dörfler, “Projected grid-forming control for current- limiting of power converters,” in Proc. 57th Annu. Allerton Conf. Com- mun., Control, Comput., Allerton, IL, USA, 2019, pp. 326–333. [42] F. Welck, D. Duckwitz, and C. Gloeckler, “Influence of virtual impedance on short circuit performance of virtual synchronous machines in the 9-bus system,” in Proc. Conf. Sustain. Energy Supply Energy Storage Syst., 2017, pp. 1–7. [43] T. Qoria, H. Wu, X. Wang, and I. Colak, “Variable virtual impedance-based overcurrent protection for grid-forming inverters: Small-signal, large- signal analysis and improvement,” IEEE Trans. Smart Grid, vol. 14, no. 5, pp. 3324–3336, Sep. 2023. [44] J.L. Rodríguez-Amenedo, S.A. Gómez, M. Zubiaga, P. Izurza-Moreno,

J. Arza, and J. D. Fernández, “Grid-forming control of voltage source converters based on the virtual flux orientation,” IEEE Access, vol. 11, pp. 10254–10274, 2023. [45] J. Dolado Fernández, J. Eloy-Garcia, S. Arnaltes, and J. L. Rodríguez- Amenedo, “Sequence control strategy for grid-forming voltage source converters based on the virtual-flux orientation under balanced and un- balanced faults,” Energies, vol. 16, 2023, Art. no. 3056. [46] IEEE Standard for Interconnection and Interoperability of Distributed Energy Resources with Associated Electric Power Systems Interfaces.

  1. Accessed: Apr. 16, 2024. Online. Available: https://standards.ieee. org/ieee/1547/5915/ [47] Inverters, Converters, Controllers and Interconnection System Equip- ment for Use With Distributed Energy Resources, UL 1741,

[48] Electric Rule 21: Generating Facility Interconnections, 2020. Accessed: Apr. 16, 2024. [Online]. Available: https://www.cpuc.ca.gov/Rule21/ [49] Rule No 14.-Service Connections and Facilities on Customer’s Premises, 2016. Accessed: Apr. 16, 2024. [Online]. Available: https://www.hawaiianelectric.com/documents/billing_and_payment/ rates/hawaiian_electric_rules/14.pdf [50] National Grid ESO-The Complete Grid Code, 2024. Accessed: Apr. 16, 2024. [Online]. Available: https://dcm.nationalgrideso.com/ [51] AEMO-Power System Requirements, 2020. Accessed: Apr. 16, 2024. [Online]. Available: https://www.aemo.com.au/-/media/Files/Electricity/ NEM/Security_and_Reliability/Power-system-requirements.pdf [52] National Electricity Rules version 209, 2024. Accessed: Apr. 16, 2024. [Online]. Available: https://energy-rules.aemc.gov.au/ner/539 [53] Commission Regulation (EU) 2016/631 of the 14th of Apr. 2016 Es- tablishing a Network Code on Requirements for Grid Connection of Generators, 2016. Accessed: Apr. 16, 2024. [Online]. Available: https: //eur-lex.europa.eu/eli/reg/2016/631/oj [54] VDE_AR_N_4110, “Technical requirements for the connection and op- eration of customer installations to the medium volt-age network (TAR medium voltage),” Nov. 2018. Accessed: Apr. 16, 2024. [Online]. Avail- able: https://www.vde.com/en/fnn/topics/technical-connection-rules/tcr- for-medium-voltage [55] IPTO, “Integration of the regulation EU 631/2016 into the greek regulatory framework,” (Public Consultation Document), 2019. Accessed: Apr. 16, 2024. [Online]. Available: https://www.admie.gr/sites/default/files/ diaboyleyseis/attached-files2020/09/Integration_of_the_Regulation_ EU_631-2016_into_the_Greek_Regulatory_Framework.pdf [56] Ministerio para la Transición Ecológica y el Reto Demográfico. Orden TED/749/2020, de 16 de Julio, Por La Que Se Establecen Los Requisitos Técnicos Para La Conexión a La Red Necesarios Para La Implementación de Los Códigos de Red de Conexión, 2020, pp. 62406–62458. Accessed: Apr. 16, 2024. [Online]. Available: https://boe.es/boe/dias/2020/08/01/ pdfs/BOE-A-2020-8965.pdf#page=6 [57] Norma técnica de supervisión de la conformidad de los módulos de generación de electricidad según el Reglamento UE 2016/631, 2021. Accessed: Apr. 16, 2024. [Online]. Available: https://aelec.es/wp-content/ uploads/2021/07/20210709-NTS-SEPE-v2.1.pdf

Joaquín Eloy-García received the Ph.D. degree in electrical engineering from the Carlos III University of Madrid, Getafe, Spain, in 2007. He was with the Carlos III University of Madrid until 2013. He is currently Chief Technical Officer with Ingenia Power Solutions SL, Madrid, Spain, a company of the Gransolar holding, focused on control of PV plants and storage plants.

Eduardo Rausell Navarro received the B.S. degree in electrical engineering in 2021 from the Polytech- nic University of Valencia, Valencia, Spain, and the

M.S. degree in renewable energies and power systems in 2022 from the University Carlos III of Madrid, Getafe, Spain, where he is currently working toward the Ph.D. degree in electrical engineering. In 2024, he joined the Department of Technology, Research Centre for Energy, Environment, and Tech- nology (CIEMAT), Madrid Spain, as a Researcher. His research interests include the control, modeling control with enhanced dynamics of grid-forming converters during fault and simulation of power converters, renewable energy systems, energy storage systems, and green hydrogen systems.

Santiago Arnaltes Gómez received the Ph.D. degree in industrial engineering from the Polytechnical Uni- versity of Madrid, Madrid, Spain, in 1993. He is currently a Full Professor in Electrical En- gineering with the Carlos III University of Madrid, Getafe, Spain. His research work is focused on the modeling, simulation and control of renewable energy systems, and energy storage systems.

[58] M. Abubakar, H. Renner, and R. Schürhuber, “Development of a novel control scheme for grid-following converter under asymmetrical faults,” Energies, vol. 16, 2023, Art. no. 1276. [59] M. Abubakar, H. Akbari, and H. Renner, “Development of reference cur- rent calculation scheme for grid-side converter during unbalanced faults,” in Proc. 2nd Int. Conf. Sustain. Mobility Appl., Renewables Technol., Cassino, Italy, Nov. 2022, pp. 1–9. [60] V. A. F. Almeida, G.N. Taranto, and J. M. T. Marinho, “Phasor-domain dynamic model of asymmetric current injection controller for converter- interfaced generator,” J. Mod. Power Syst. Clean Energy, vol. 9, 1269– 1278, 2021. [61] M.G. Taul, X. Wang, P. Davari, and F. Blaabjerg, “Current reference generation based on next-generation grid code requirements of grid-tied converters during asymmetrical faults,” IEEE J. Emerg. Sel. Top. Power Electron, vol. 8, no. 4, pp. 3784–3797, Dec. 2020. [62] L. Zhang, L. Harnefors, and H. P. Nee, “Power synchronization control of grid-connected voltage source converters,” IEEE Trans. Power Syst., vol. 25, no. 2, pp. 809–820, May 2010. [63] M. Ndreko, S. Rüberg, and W. Winter, “Grid forming control for stable power systems with up to 100% inverter based generation: A paradigm scenario using the IEEE 118-bus system,” in Proc. 17th Int. Workshop Large-Scale Integration Wind Power Syst., 2018, pp. 16–18. [64] Z. Shuai, W. Huang, C. Shen, J. Ge, and Z. John Shen, “Characteristics and restrain method of fast transient inrush fault currents in synchronverters,” IEEE Trans. Ind. Electron., vol. 64, no. 9, pp. 7487–7497, Sep. 2017. [65] M. G. Taul, X. Wang, P. Davari, and F. Blaabjerg, “Current limiting

conditions,” IEEE Trans. Emerg. Sel. Topics Power Electron., vol. 8, no. 2, pp. 1062–1073, Jun. 2020. [66] S.D. Tavakoli, E. Prieto-Araujo, O. Gomis-Bellmunt, and S. Galceran- Arellano, “Fault ride-through control based on voltage prioritization for grid-forming converters,” IET Renewable Power Gener., vol. 17, pp. 1370–1384, 2023. [67] J. Freytes, J. Li, G. de Préville, and M. Thouvenin, “Grid-forming control with current limitation for MMC under unbalanced fault ride-through,” IEEE Trans. Power Del., vol. 36, no. 3, pp. 1914–1916, Jun. 2021. [68] Z. Li, K. W. Chan, J. Hu, and S. W. Or, “An adaptive fault ride-through scheme for grid-forming inverters under asymmetrical grid faults,” IEEE Trans. Ind. Electron., vol. 69, no. 12, pp. 12912–12923, Dec. 2022. [69] R. Rosso, S. Engelken, and M. Liserre, “On the implementation of an FRT strategy for grid-forming converters under symmetrical and asymmetri- cal grid faults,” IEEE Trans. Ind. Appl., vol. 57, no. 5, pp. 4385–4397, Sep./Oct. 2021. [70] A. Acharya and R. Ayyanar, “Dual-dVOC based controlled negative sequence current injection for grid-forming inverters under asymmetrical grid conditions,” in Proc. IEEE Power Energy Soc. Gen. Meeting, Orlando, FL, USA, 2023, pp. 1–5, doi: 10.1109/PESGM52003.2023.10252240. [71] I. Khan and S. Doolla, “Improved fault ride-through response of grid form- ing inverters under symmetrical and asymmetrical faults,” IEEE Trans. Energy Convers., to be published, doi: 10.1109/TEC.2024.3419010. [72] M. -A. Nasr and A. Hooshyar, “Controlling grid-forming inverters to meet the negative-sequence current requirements of the IEEE standard 2800- 2022,” IEEE Trans. Power Del., vol. 38, no. 4, pp. 2541–2555, Aug. 2023. [73] J. Svensson, M. Bongiorno, and A. Sannino, “Practical implementation of delayed signal cancellation method for phase-sequence separation,” IEEE Trans. Power Del., vol. 22, no. 1, pp. 18–26, Jan. 2007. [74] J. Dolado, J. L. Rodríguez Amenedo, S. Arnaltes, and J. Eloy-Garcia, “Im- proving the inertial response of a grid-forming voltage source converter,” Electronics, vol. 11, 2022, Art. no. 2303. [75] L. Zhang and M. H. J. Bollen, “Characteristic of voltage dips (sags) in power systems,” in Proc. 8th Int. Conf. Harmon. Qual. Power. Proc.,

José Luis Rodríguez Amenedo (Senior Member, IEEE) received the M.S. degree in industrial engi- neering from the University Polytechnic of Madrid, Madrid, Spain, in 1994, and the Dr.-Ing. (Ph.D.) de- gree in industrial engineer from the University Carlos III of Madrid, Getafe, Spain, in 2000. From 1999 to 2000, he was with Iberdrola Engi- neering, Bilbao, Spain, as Technology Wind Turbine Manager and from 2001 to 2003 with Iberdrola Re- newables as a Wind Energy Manager. In 2003, he joined to the Electrical Department, University Carlos

from the University of Alcalá, Alcalá de Henares, Spain, in 2018, and the M.S. degree in automation and robotics from the University Polytechnic of Madrid, Madrid, Spain, in 2020. He has been working toward the Ph.D. degree in electrical engineering with the University Carlos III of Madrid, Getafe, Spain, since

  1. His research interests include control of power electronic converters, grid-forming converters, and power system stability.

Athens, Greece, 1998, pp. 555–560. III as an Associate Professor. In 2008–2011, he requested an academic leave of absence for founding the technological companies Energy to Quality (E2Q) and Juan Dolado Fernández received the B.S. degree Wind to Power Systems (W2PS). His research interests include renewable energy in electronic engineering and industrial automation integration into the grid, power electronic converter control, HVdc transmission systems, and energy storage solutions.

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ARTICLE SUMMARY文章摘要

> 摘要:IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 40, NO. 1, JANUARY 2025 ## Low-Voltage Ride-Through Algorithm for Grid-Forming Converters Juan Dolado Fernández, Joaquín Eloy-García, Eduardo Rausell

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